As an Integration Engineer, you will be responsible for technology development across process modules that constitute 3D NAND. Your role focuses on ensuring alignment and optimization of each module within the overall process flow. You will lead process technology development, improvement initiatives, and manufacturing parameter adjustments for specific modules.

About You:

• To meet the electrical performance and reliability requirements of memory devices, you will drive development and enhancement of manufacturing technologies, including new materials, device structures, and layout innovations. Your scope will include:

• Technology development for NAND memory
• Process development for TSV (Through-Silicon Via) modules
• Wafer bonding process development
• Core process integration tasks, such as:
  • Inline metrology and structural analysis using SEM/TEM
  • Electrical characterization and process change evaluations
  • Yield improvement, reliability enhancement, and cost reduction activities
  • Process flow design and execution management

• Additionally, you will be involved in mask creation and collaborate with device, GDR/EDR, and design teams to define design rules. This role requires close coordination with cross-functional teams across domestic and international sites, including process, test, and design teams, as well as JV partners, to jointly drive development efforts.

All your information will be kept confidential according to EEO guidelines.