We are seeking a Senior Analog Engineering Manager to lead the development of DDR5 and next-generation DDR6 PHY solutions for advanced SoCs. This role requires deep technical expertise in high-speed memory interfaces, combined with strong people leadership and program ownership.

The successful candidate will manage a team responsible for end-to-end delivery of high-performance, low-power DDR PHYs, from architecture through silicon bring-up, while shaping the roadmap for DDR6-class signaling and architecture

                                       Technical Leadership (DDR5 / DDR6)

• Own and guide the architecture, design, and implementation of DDR5 PHYs and contribute to DDR6-ready architectures.
• Provide technical oversight for critical analog and mixed-signal blocks, including:
• High-speed TX/RX datapaths
• Advanced equalization, termination, and training circuits
• DLL/PLL-based clocking solutions for multi-GHz operation
• Voltage, reference generation, and power-aware IO design
• Drive closure on timing, jitter, noise, SI/PI, and PVT robustness for aggressive DDR5/DDR6 data rates.
• Ensure compliance with JEDEC DDR5 specifications and alignment with evolving DDR6 standards and industry direction.
• Lead post-silicon bring-up, characterization, debug, and yield improvement, including lab and customer-system correlation.

                                      People & Organization Leadership

• Build, lead, and mentor a team of analog and mixed-signal designers focused on high-speed memory interfaces.
• Set technical direction, performance expectations, and development plans for senior and principal engineers.
• Drive hiring, onboarding, and team scaling aligned with DDR5 production and DDR6 development needs.
• Foster a culture of technical rigor, ownership, and execution excellence.

                                      Program & Cross-Functional Execution

• Own DDR5/DDR6 PHY execution balancing schedule, quality, and risk
• Partner closely with: Digital PHY and controller teams SoC integration and system architecture, Package, PCB, SI/PI, and validation teams, Product, program management, and customers
• Interface with foundries, IP vendors, and standards bodies as needed to ensure successful delivery and future readiness.

                                    Methodology, Quality & Roadmap

• Establish robust design and signoff methodologies for next-generation high-speed PHYs.
• Drive continuous improvement in simulation accuracy, mixed-signal verification, and silicon debug efficiency.
•  Lead long-term DDR5 sustainment and DDR6 technology roadmap planning, including architectural trade-offs and scaling strategies.
• Anticipate challenges from data-rate scaling, power efficiency, and advanced process technologies

• Bachelor’s or Master’s degree in Electrical Engineering (PhD preferred).
• 12+ years of experience in analog/mixed-signal IC design with deep focus on high-speed memory interfaces.
• 5+ years of people-management and technical leadership experience.
• Proven hands-on delivery of DDR5 PHYs or late-stage DDR4 designs transitioning to DDR5
• Strong expertise in: High-speed IO design and signal integrity, PLL/DLL and low-jitter clocking architectures,Mixed-signal verification and silicon validation, Advanced CMOS process considerations for IOs

                                  Preferred Qualifications

• Direct involvement in DDR6 architectural studies or early-stage development.
• Experience at advanced nodes (7nm, 5nm, and below).
• Background in multi-generation memory PHYs or scalable PHY platforms.
• Ability to lead teams delivering multiple concurrent tape-outs.
• Strong written and verbal communication skills across technical and executive audiences.

                            Leadership Profile

• High technical credibility with the ability to dive deep when needed
• Strong execution mindset with disciplined risk management
• Effective mentor and team builder
• Strategic thinker with a roadmap-driven approach to DDR evolution
• Comfortable balancing hands-on engagement with organizational leadership

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.
 
With a diverse team of over 22,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’     
 
At Renesas, you can: 

• Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.  

• Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. 

• Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.    

Are you ready to own your success and make your mark?  

Join Renesas. Shape Your Future with Us.  

Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning.