Compiler Engineer (dream job - your write it)

  • Full-time

Company Description

VISC architecture can achieve three to four times more instructions per cycle, which results in two to four times higher performance per watt on single- and multi-threaded applications.

 

The key differentiator with VISC from RISC and CISC chip designs is that VISC does not use conventional out-of-order execution (OOE) designs like in the x86 or IBM Power processor. If you are going to process things out of order, you have to reassemble the results, which consumes a significant amount of power.

Job Description

You will own compiler engineering as you will be the only person to design develop and decide on engineering issues.  The previous person who served in the role for 5 years has moved on to rejoin former co-workers engaged in new design challenges in deep learning project. 

This position is responsible for constructing Just in time compilers (JIT), performance analysis, optimization and code generation.

VM JIT experience or Android Dalvik experience is a huge plus. Experience with the LLVM Core Libraries and MC JIT is a plus.


This position involves designing and implementing code optimization algorithms in both static and just in time code optimization frameworks at the binary code level.  Responsibilities include running experiments on existing processor simulators.  Integrating the optimization implementations with simulators and test benches may also be required. 


The candidate should be familiar with standard compiler optimization algorithms and be comfortable adapting these for use in a just in time environment.  Also required is the ability to design and execute experiments to measure the effects of code optimizations on various metrics of performance on a processor.  

The working knowledge of complexity analysis is required for analysis of algorithm feasibility

Qualifications


-          Knowledge of VM JIT or Android/Dalvik architecture, best candidate would have worked on Android JIT for ARM systems.

-          Experience with JIT compilers and/or QEMU

-          LLVM MC JIT experience is a plus

-          Experience with low-level optimization and code generation. Preferably ARM processors ( ARM V7 architecture: Thumb/Thumb-2 /Thumb-EE, assembly) 

-          Strong C/C++

-          Knowledge of compiler systems, including assemblers, linkers, C/C++ libraries, JIT,

Compiler performance evaluation is preferred

-          Knowledge of other computer architectures is a plus

Additional Information

Inside a $125 Million Silicon Startup

Persuasive CEO meets passionate CTO

SANTA CLARA, Calif. — A microprocessor startup that raises $125 million is a rare desert flower in Silicon Valley these days. The founders of Soft Machines shared some of the story of how they survived seven years through a historic recession and the hurdles that still stand between the company and its first revenue.

Mahesh Lingareddy always saw himself as more an entrepreneur than an engineer. When he got out of college in the 1990s, he turned down his first job offers at established companies. Instead, he joined Rise Technology, a startup designer of x86-compatible processors.

The biggest thing I learned is it's a roller coaster ride. One day, underwriters were pricing an IPO, and the next month, they couldn't get financing to make payroll, so their people left. The team will leave if you can't pay them.

I hung around for the next six months or so to sit with the CEO as he explained what happened. I learned you need to be pragmatic. If you get emotionally attached to a particular outcome, like being in The Wall Street Journal or having an IPO, you start making wrong decisions.

Later he joined Intel as an engineer, slowly climbing up its middle management ranks. Along the way, he met Mohammad Abdallah, a lead processor architect full of ideas and passion.

"He believed I could build a company, and I believed he could develop an architecture, so we left," Lingareddy said.

The two saw Intel hit the power wall with its Pentium 4 that failed to hit its 6GHz and 10GHz speed targets. In the shift to multicore architectures that followed, Lingareddy and Abdallah thought they could plant their new company.

Lingareddy put together three slides and approached his former boss's boss, Intel vice president Albert Yu, who had recently retired after less-than-stellar experiences with Intel's P4 and Itanium projects. "He didn't want to be in chips at all anymore, but after two hours with him at the Santa Clara Marriott, he wrote us a $100,000 check." With the seed funds, Lingareddy hired a half dozen UC Davis students, who helped Abdallah build a simulator for his initial concepts.

Later, Lingareddy heard Gordon Campbell was giving a talk on the problems with faltering processor performance. The young CEO saw his opening and buttonholed Campbell after the talk.

Once again, Lingareddy proved to be persuasive. Campbell wrote a million-dollar check and became chairman of Soft Machines. Along the way, another former Intel executive, Richard Wirt, became a third angel investor.

The funds fueled the startup's work building a proof-of-concept prototype in an FPGA. "Every time we thought we had a near-death experience, someone showed up -- Albert, Gordy, Richard."

When the 2008 downturn hit, Lingareddy briefly shopped the startup with venture capitalists on Sand Hill Road. He quickly realized they were focused on finding the next Facebook and Twitter and no longer had the stomach for investing the money and time a microprocessor startup requires.

When Globalfoundries announced that it was acquiring Chartered Semiconductor in late 2009, Lingareddy saw that the investors in Abu Dhabi behind the deal were his best target. He snagged a meeting to pitch Soft Machines with managers from Mubadala Technology and their advisers from Goldman Sachs, and he hopped on a plane to the Middle East. "The key with them was establishing trust and managing expectations."

Once again, Lingareddy made his case successfully, winning what has become his largest investor to date. With the investment, Globalfoundries chief executive Sanjay Jha succeeded Campbell as the startup's chairman.

CTO Abdallah also helped on the finance side, introducing Lingareddy to his connections in Saudi Arabia's national science and technology institute. "That drove a lot of Saudi investment," Lingareddy said.

By 2010, Soft Machines already had a small team of engineers placed in Russia. On a visit to the office, Lingareddy was contacted by the then-new Rusnano group, which wanted to invest in his startup.

Looking for corporate partners that might eventually use Soft Machines' technology, Lingareddy approached AMD. At first, the company's top technologist, the late Chuck Moore, "said no way," but Abdallah managed to spend a couple of days with Moore at the startup's Silicon Valley office to argue his case.

"I can't forget his last email to me," Lingareddy said. "He said, 'You guys got it.' That was one of his last emails."

Later, Samsung's corporate investment arm got word of the startup and "made a significant investment."

Along the way, Soft Machines has hired Silicon Valley veterans as advisers: John Mashey, formerly of Silicon Graphics; Wirt from Intel; and Ross Smith, a co-founder of 3Dfx, an early graphics pioneer. "I supported myself with a very strong board and advisers. This is my first time as CEO, and I am the weakest link."

Lingareddy cultivates a humble attitude in the face of the millions he has raised. Growing up in a small village in India, he never imagined he would be chief executive of a company with investors and partners in Korea, the Middle East, Russia, and the US.

As amazing as his accomplishments have been, Lingareddy still has big mountains to climb. He aims to close a "huge" Series C funding round to finance the startup for next three years. And he has to persuade big, established microprocessor companies to adopt the startup's technologies if he expects to generate revenue and profits.

Abdallah, the company's CTO, said it is already "working with a few partners" but is interested in working with more. Meanwhile, he has to turn an interesting prototype into a family of licensable products -- no small task.

Abdallah demonstrated a 28nm dual-core version of his virtual core approach at the Linley Processor Conference here. The 300-400MHz prototype chip ran 32-bit ARM software at performance levels that suggest its technology could provide a leap over current approaches. It looked impressive and could be the gist of a first product.

The startup aimed for 10x improvements but on average expects to deliver still respectable 4x gains. The good news is its technology could be applied to a broad range of chips, from IoT and mobile SoCs to server processors.

Now Abdallah's team needs to define and demonstrate products ready for commercial licensing. The next big target is a quad-core version running at about 1.5 GHz.

Depending on market segment, two cores may be enough to beat everyone, but in the server, four cores is the killer… We will never go to very high frequencies. It's unrealistic. Performance doesn't scale linearly with frequency. [We will]start at maybe 20-30% less frequency than others, and that's an opportunity to keep our design [challenges]moderate.

Moving from a prototype to a product also requires a major step in sophistication and validation of the technology. "We did simulations of four cores, so this is mostly logistics." Eight-core versions are also possible.

Specifically, the Soft Machines technology involves a so-called global front end (GFE), a new processor element that breaks single-threaded software into smaller operations such as fetches and loads. It feeds those operations into a virtual pipeline, dynamically constructed from the physical resources of an underlying multicore processor based on the workload's needs.

The GFE unit adds three new stages to the front end of a traditional processor pipeline, but "that is the wise place to spend your latency budget," Abdallah said.

The operating system and higher-level software do not need to know how the code is being dissected into virtual threads, he said. An intermediate software layer below the operating system and hypervisor turns software into the company's own so-called VISC instructions. Thus, Soft Machines could apply its technology to any processor -- ARM, MIPS, Power, or x86.

To make the approach work, the physical cores need some new communications and synchronization logic. "It's another level of microarchitectural detail, but it's not horrible to implement."

Still, it’s a lot of low-level engineering work overall. That's one reason why Lingareddy expects both to license technology and to do co-development work. But Abdallah said the resulting chip will deliver better performance with less complexity than a full out-of-order design.

The proof of that pudding won't be ready until at least 2015. In the meantime, both founders have their work cut out for them.