Principal Engineer, ASIC Development Engineering

  • Bangalore, India
  • Full-time
  • Business Function: ASIC Development Engineering
  • Work Location: Bangalore SNDK Office--LOCATION-3-265

Company Description

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon.

We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Western Digital is fueling a brighter, smarter future.

Binge-watch any shows, use social media or shop online lately? You’ll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too.

We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital®, G-Technology™, SanDisk® and WD® brands.

Today’s exceptional challenges require your unique skills. It’s You & Western Digital. Together, we’re the next BIG thing in data.

Job Description

Required Experience:
5+ years of experience in full custom layout for Analog and mixed signal circuits
Should have hands-on experience in custom layout for analog and IO circuits (Bandgap, LDOs, Clocking circuits, GPIOs, DDR IOs, ESD circuits etc)
Familiarity with custom digital layout (i.e. high speed logic paths)
Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding)
Experience in layout delivery flow – different views generation like LIB, LEF, GDS, etc.
Strong experience in debugging DRC, ERC and LVS issues independently.
Aware of layout techniques to mitigate ESD, latch-up
Knowledge of design for reliability (i.e. EM, IR, self-heating, etc.)
Should have solid understanding of CMOS and FinFET process technologies and associated issues in deep sub-micron technologies i.e. 28nm, 16nm, 7nm
Also should have sound understanding of IC fabrication and reliability issues
Full familiarity with Cadence and Mentor Graphics layout tools
Experience in scripting in Perl and/or Skill to develop scripts for automation is an advantage
Should possess good documentation, communication and presentation skills
Experience of working in a multi-site environment

Additional Information

Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.