Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

SSD Tester Development Engineer (Hardware)

Location: Shanghai (Caohejing), China

In this position, the candidate will work together with other tester developers in our SSD tester development team to design next generation testers for SSD manufacturing and qualification. Key responsibilities include:

• Own hardware validation plans for SSD tester boards/modules and carrier/backplane platforms: electrical checklists, bring-up sequences, acceptance criteria.
• Design small PCBs/fixtures/interposers for validation: M.2/U.2/U.3 caddies, power-sense boards (shunt/INA/SMU), PMBus/I²C/USB bridges, relay/mux boards; manage schematic capture, basic layout, BOM/derating, and fab/assembly handoff.
• Instrumented measurements & characterization: rail accuracy/ripple/transient, inrush/hold-up, POR/RESET timing, clock/jitter sanity, thermal mapping (IR), connector/cable loss checks, temperature and power cycling.
• Automate benches with Python (PyVISA/SCPI/serial) to control scopes, e-loads, PSUs, chambers; log/plot/store data; build repeatable test recipes.
• Light OS/storage interaction (Linux): run nvme-cli/fio to stimulate workloads and correlate with electrical/thermal results; parse dmesg/SMART/telemetry.
• Failure analysis support: quick isolation on bench, rework experiments, vendor FA coordination; document root cause and corrective actions.
• Cross-team collaboration with FW/SOC/Board/ME: drive design fixes, review schematics/layout for testability (test points, probe keep-outs, PDN decoupling).

Minimum qualifications:

• Master’s degree in Electrical Engineering, Computer Engineering, or a closely related discipline.
• College graduates, or experienced candidates with 2-4 year working experience.
• Solid electronics fundamentals: analog/digital basics, power converters, PDN/decoupling, signal-integrity/return-path basics.
• Hands-on PCB experience: at least one end-to-end board you designed (≥4-layer preferred) and brought up on a bench.
• Measurement competence: oscilloscopes, DMM, electronic loads/PSUs, SMU or power analyzer, logic analyzer; safe ESD practice.

Skills below will be a plus:

• Board/schematic CAD: Altium Designer or OrCAD/Cadence; layout review literacy (stack-up, diff-pair, clearance, stitching).
• Experience with one or more programming languages such as Python, C/C++.
• SI/PI tool literacy: HyperLynx/Sigrity/ADS or SPICE for quick what-ifs; S-parameters/TDR basics.
• Thermal & mechanical awareness: heat-spreader/thermal pad choices, basic airflow experiments, simple ME collaboration.
• Storage familiarity: NVMe concepts (queues, namespaces, SMART), basic workload crafting with fio.
• PCIe familiarity (lightweight): Have a basic understanding over PCIe protocol and form factors (M.2/U.2/AIC/EDSFF)
• FPGA development experience: able to develop RTL to implement logic modules for a system.
• Power/management buses: PMBus/I²C scripting; INA/ADC current/power telemetry.

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