Staff Engineer, ASIC Development Engineering
- Full-time
- Job Type (exemption status): Exempt position - Please see related compensation & benefits details below
- Business Function: ASIC Development Engineering
- Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP
Company Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
Job Description
We are seeking a highly skilled and innovative Staff Engineer specializing in ASIC Development Engineering to join our team in Milpitas, United States. In this role, you will lead the development of cutting-edge Application-Specific Integrated Circuits (ASICs) and contribute to the advancement of our semiconductor technology.
- Lead the design and implementation of complex ASIC architectures
- Collaborate with cross-functional teams to define and optimize ASIC specifications
- Develop and maintain RTL code for ASIC designs using industry-standard HDLs
- Create and execute comprehensive verification plans to ensure design quality
- Perform timing analysis and implement power optimization techniques
- Guide junior engineers and contribute to the overall technical direction of ASIC projects
- Participate in design reviews and provide technical expertise to resolve complex issues
- Stay current with emerging trends and technologies in ASIC development
- Contribute to the development of reusable IP blocks and design methodologies
- Interact with foundries and external partners to ensure successful tape-outs
Qualifications
- Bachelor's or Master's degree in Electrical/Electronics Engineering or Computer Engineering
- 5+ years of experience in ASIC development engineering
- Deep understanding of digital design principles and RTL coding
- Proficiency in SystemVerilog, Verilog, and UVM-based verification methodologies
- Extensive experience with ASIC design flow and methodologies
- Strong knowledge of bus protocols (e.g., AXI, AHB, APB) and various interfaces (e.g., PCIe, USB, I2C, SPI)
- Expertise in implementing advanced test benches and verification models
- Experience with EDA tools for ASIC development and gate-level simulations
- Solid understanding of timing analysis, constraints, and power optimization techniques
- Knowledge of Chiplet Protocols, particularly UCIe
- Experience working on processor-based SoCs (e.g., ARM, RISC-V)
- Excellent debugging and problem-solving skills
- Strong programming/scripting skills (Python, Perl, TCL, BASH)
- Demonstrated ability to lead technical projects and mentor junior engineers
- Excellent communication and collaboration skills
- Passion for innovation in ASICs, SoCs, and semiconductor technologies