SEAKR Engineering is seeking an FPGA Engineer with experience in Test System Design and Verification. The SEAKR Engineering test methodology follows the principle of "Test Like You Fly", as such this role requires a Test System Design engineer to design and procure test equipment that is capable of performing interface validation and emulation of system ConOps and behaviors.

The FPGA Engineer in the Test System Design Group is responsbile for:

• Lifecycle program support, from kick-off to Test Readiness Review.
• FPGA designs of moderate to high complexity using Verilog and/or VHDL.
• Simulation, debug, synthesis operations, and timing analysis.
• FPGA process adherance and development flows using Synplify Pro, ISE, Vivado.
• Specification and integration of third party IP.
• Supporting flight and/or Engineering model system integration and checkout prior to formal test.

Required skills

• FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design.
• Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers.

The ideal candidate will have previous experience assessing program requirements and identifying equipment required to emulate unit interfaces. This candidate must have a Bachelor's degree in electrical engineering.

U.S. Citizenship is required. 

All your information will be kept confidential according to EEO guidelines.