Greetings from ReadMind Info Services.......!!!

Designation:physical Design Engineer

Location: Bangalore

Experience: 3 - 8 Years

Required Skills & Knowledge

• ICC, block level and some top level experience.

• Design planning, partition, full chip level floorplan, bump placement, bump routing, power routing, block level floorplan, power plan.

• place and route, CTS, STA, physical verification.

• DRC, LVS, IR-EM analysis, debugging gds level issues.

• Giving technical guidance to junior engineers in block/full chip level activities.

• Working experience in 14nm or lower geometry is advantage.

Note:Please send me the following details along with your revalent updated CV.

Total Exp:

Relevant Exp:

Current CTC:

Expected CTC:

Notice period:

Present Location :

All your information will be kept confidential according to EEO guidelines.