FPGA Engineer

  • Full-time

Company Description

Checkpoint Systems, a division of CCL Industries, is a global leader in merchandise availability solutions for B2B and B2C retailers, encompassing loss prevention, merchandise visibility and IoT product ecosystems that work in concert to drive profitability and enhance the customer experience. Checkpoint Systems provides end-to-end solutions enabling retailers to achieve accurate real-time inventory, accelerate the replenishment cycle, prevent out-of-stocks and reduce theft, thus improving merchandise availability and the shopper’s experience. Our intelligent retail solutions are built upon 50 years of radio frequency technology expertise, innovative high-theft and loss-prevention solutions, market-leading RFID hardware, software, cloud-based SaaS, and customizable labeling and EAS antennas capabilities, to brand, secure and track merchandise from source to shelf.  Our customers include many of today’s top brick and click retailers, offering an array of customizable solutions for Drug, Supermarket, Apparel, Electronics, General Merchandise and Big Box stores.  Global headquarters is located in Thorofare, NJ, and features a state-of-the-art Customer Experience Center, showcasing Intelligent Retail Store solutions.

Checkpoint Systems operates in every major geographic market and employs over 4,000 people worldwide. We offer a competitive compensation package and comprehensive benefits package that includes life, health, dental and vision, 401(k), flexible spending accounts and tuition reimbursement. We care about our people as they are the key to our success. We also provide an open and friendly work environment where we empower people with opportunities to collaborate with global teams, launch innovative products, and grow professionally with a dynamic organization.  

EEO AAP Employer/Vet/Disabled 
Drug Free Workplace

Job Description

Job Duties

  • Understand product requirements, architect a solution targeting an FPGA against those requirements and implement that solution in an FPGA.
  • Support the full life cycle development and integration of VHDL into different families of FPGAs.
  • Must understand technology trends to suggest improvements for engineering design processes and engineering tools.
  • Must be flexible, organized, results-oriented, problem solver who requires minimal supervision.
  • Must have drive and the ability to thrive on variety and enjoy taking on new challenges.
  • Ability to work in a team environment and collaborate with Hardware, Software and Systems Engineering personnel to develop solutions.
  • Possess skills to handle a fast pace and dynamic product development environment.
  • Strong team player with good interpersonal skills as well as excellent written/verbal communication skills.

Qualifications

Education

  • Required Education: BS degree in Electrical Engineering, MS Degree in Electrical Engineering preferred

Experience

  • Minimum 5 years of experience in digital hardware FPGA design and verification

Knowledge, Skills & Abilities

  • Experience with Xilinx FPGA Development tools: ISE, Vivado and Xilinx SoCs desired
  • Experience with FPGA simulation to verify performance, then integrate and test the FPGA on the circuit card assembly
  • Experience with System Generator, Matlab and Simulink
  • Knowledge of FPGA design implementation with VHDL design language
  • Knowledge of embedded processors, C programming language and SOC development for FPGA devices
  • Thorough understanding of VHDL, the FPGA design process and the tools used to generate the FPGA designs (VHDL, Synthesis, Place and Route, Simulation, Timing Analysis and Timing closure)
  • Experience writing detailed verification test plans and test reports
  • Ability to estimate FPGA resource requirements
  • Experience with HF, UHF and/or RFID software defined radio-based systems desired
  • Experience with interfaces, communication protocols and bus standards such as: USB, AXI, I2C, SPI, UART, RS-232/422/485
  • Experience designing with memory map and register-read/write across interfaces following company proprietary protocols

Additional Information

All your information will be kept confidential according to EEO guidelines.