Introduction

Are you a digital electronics designer with experience in verification of complex digital ASICs? We are seeking to strengthen our capabilities in digital-on-top functional verification of our ASICs and aim to share this expertise and best practices with collaborating groups in the broader high-energy physics community. Working on the 65nm node or below, we aim for designs with high performance and robust behaviour in the harsh environment of the LHC experiments. Thorough functional verification is a key component in helping to minimise the number of iterations required for complex designs. Take part!

Functions

You will join the Electronic Systems for Experiments Group (ESE) of the Experimental Physics Department (EP), which designs electronic systems, including ASICs, for the experiments at CERN and also supplies a series of electronics related services. The Microelectronics section (ME) develops analogue and digital integrated circuits for the readout and control of the CERN experiments.

As an ASIC digital design and verification engineer in the Microelectronics section of the ESE group, you will:

• Provide design verification services for complex digital-on-top ASICs for the HL-LHC experiments.
• Define and develop complex test benches using the UVM methodology to help producing first-time-right silicon.
• Perform design synthesis and post layout verification on complex ASICs.
• Share knowledge as an expert in verification of complex ASICs both within the CERN group and in the broader high-energy physics community. 

Master's degree or PhD or equivalent relevant experience in the field of electronics engineering or a related field.

Experience:

The experience required for this post is:

• Demonstrated experience in verification of complex ASICs using standard verification methodologies such as UVM/OVM.
• Experience in defining and implementing coverage models, analysing results, and achieving verification closure.
• Experience with ASIC digital physical implementation flow in at least one modern CMOS process.

Experience in the following fields will also be valued:

• Experience with System Verilog Assertions (SVA) and formal verification.
• Experience in fault injection techniques for Single Event Upsets (SEUs) mitigation.
• Experience with power analysis tools.
• Experience in writing synthesizable RTL code.
• Experience with the use of CAE tools for mixed mode microelectronics design: analog simulation, compact layout, extraction and re-simulation.

Technical competencies:

• Knowledge and application of high-level description languages and tools.
• Design and simulation of digital electronic circuits.
• Design and simulation of digital microelectronic circuits.

Behavioural competencies:

• Working in teams: understanding when teamwork is required to achieve the best results; including others accordingly and sharing information.
• Achieving results: having a structured and organised approach towards work; being able to set priorities and plan tasks with results in mind.
• Demonstrating flexibility: adapting quickly and resourcefully to shifting priorities and requirements.
• Communicating effectively: checking to ensure that the message has been well understood; ensuring that information, procedures and decisions are appropriately documented.
• Learning and sharing knowledge: keeping up-to-date with developments in own field of expertise and readily absorbing new information; sharing knowledge and expertise freely and willingly with others; coaching others to ensure knowledge transfer.

Language skills:

• English: spoken and written with the ability to draw up technical texts.
• The ability to understand and speak French in professional contexts would be an advantage.

Eligibility and closing date:

Diversity has been an integral part of CERN's mission since its foundation and is an established value of the Organization. Employing a diverse workforce is central to our success. We welcome applications from all Member States and Associate Member States.

This vacancy will be filled as soon as possible, and applications should normally reach us no later than 09.08.2020

Employment Conditions

Contract type: Limited duration contract (5 years). Subject to certain conditions, holders of limited-duration contracts may apply for an indefinite position.

These functions require:

• Work during nights, Sundays and official holidays, when required by the needs of the Organization.

Job grade: 6-7

Job reference: EP-ESE-ME-2020-95-LD

Benchmark Job Title: Electronics Engineer