Master Thesis Identifying Fixes to Eliminate Refinement Inconsistency of Contract-Based Design

  • Robert-Bosch-Campus 1, 71272 Renningen, Germany
  • Full-time
  • Legal Entity: Robert Bosch Car Multimedia GmbH

Company Description

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The Robert Bosch GmbH is looking forward to your application!

Job Description

The complexity of modern, software-intensive systems continues to increase due to the rising number of features and functionalities. For complex, safety-critical, and software-intensive systems, safety is of paramount importance. To ensure safety, these systems and their requirements are analyzed using established methods like FMEA, FTA, or HAZOP. However, engineers still perform the safety analysis manually to identify potential safety flaws, which is time-consuming and error-prone. Formal verification is a way to automate the verification process by letting an automatic model checker prove whether a system fulfils a certain requirement, e.g., a safety property. Understanding the output of a model checker is already tough and subject to several approaches such as Property Specification Patterns (PSP), Domain-Specific Languages, and counterexample explanation techniques.

The main motive of this thesis is to find possible fixes that satisfies the violated system specification. Thus, fixes can be an input to the user to understand and modify the violated system specification.

While writing your thesis with us, you are responsible for the following tasks:

  • Gain basic understanding of Contract-based Design, LTL temporal logic, and the NuSMV model checker.
  • Recognize types/classes of inconsistencies and violations found by NuSMV.
  • Identify a systematic way to find possible fixes so that the violated system specification might be satisfied.

Qualifications

  • Education: Master studies in the field of electrical engineering, computer science, or equivalent with academic subjects in formal verification, electronic design automation (EDA) or similar
  • Experience and Knowledge: Programming experience in Java. Knowledge of formal methods, temporal logics solvers, and model checkers is preferred
  • Language: Fluent English Skils

Additional Information

Start: According to prior agreement
Duration: 6 months

Requirement for this thesis is the enrollment at university. Please attach a motivation letter, your CV, transcript of records, examination regulations and if indicated a valid work and residence Permit.

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Need further information about the job?
Arut Prakash Kaleeswaran (Business Department)
+49 711 811-31159

Arne Nordmann (Business Department)
+49 711 811-7189

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