Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.

At Arista we value the diversity of thought and perspectives that each employee brings to the table. We  believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.

Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.

Who You’ll Work With

Working closely with cross-functional teams including software,Hardware, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, system validation and test  and signal integrity to deliver state-of-the-art products that drive network performance and reliability.

What You'll Do

Our EDVT team is at the forefront of testing and validating high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end testing for complex systems. EDVT team is gate keeper for hardware quality and reliability 

Job Responsibilities: 

• Perform System level Hardware DVT (EDVT) , Power/Thermal characterization & measurements, Component (Memory, PSU, optics) validations

• Develop and execute system and component-level EDVT test plans, test matrices and characterization tests

• Develop Python automation for EDVT, failure analysis, instrumentation control and long-duration testing

• Debug complex hardware failures and drive root-cause analysis using electrical measurements, system logs and controlled experiments

• Validate ASIC-based networking systems, optics, memory, PSU and other critical components

• Work closely with HW, ASIC, SW, NPI, Manufacturing and other engineering teams to resolve EDVT issues and meet product milestones

• Support multiple validation programs and contribute reusable validation methodologies and automation across Arista products

• 5+ years in Electrical Design Verification/Validation or System-Level Hardware Testing.

• BE or B.Tech in ECE, ICE or EEE

• Good understanding of fundamentals of electrical engineering, programming, and networking technologies.

• Expertise in PAM4/NRZ SerDes, high-speed signaling (400G-1.6T), BER, jitter, and link margin, PoE.

• Familiarity with liquid-cooled systems, SONiC, modular/Rack Based systems is a plus.

• Experience with IEEE 802.3 C2M spec and test methodologies.

• Hands-on with oscilloscopes, traffic generators (IXIA/Viavi), power analyzers, and thermal chambers.

• Proficient in Python for test automation, instrumentation control, and framework development.

• Experience in hardware root-cause debug, failure analysis, and power/thermal characterization.

• Familiarity with liquid-cooled systems, SONiC is a plus.

• Excellent verbal and written communication skills

• Able to work well on a team and self-driven to work independently.

• Able to handle moving the systems of 20lb to 50lb around the lab and chambers

Arista Networks is an equal opportunity employer.  Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law.  All your information will be kept confidential according to EEO guidelines.