- Guilford, CT, USA
Butterfly Network is reinventing medical imaging and championing a new era of healthcare by creating the first ever pocket-sized, whole-body ultrasound device - the Butterfly iQ. This breakthrough technology has reduced the cost of the traditional ultrasound system by miniaturizing it onto a single semiconductor silicon chip. Our mission is to democratize healthcare by making medical imaging accessible to everyone around the world.
Since inception, Butterfly has raised over $375 million. The iQ is FDA-cleared and is being sold in hospitals and clinics around the globe.
Joining Butterfly Network is the opportunity to redesign the future of healthcare through the power of technology. Embark on a journey with us to maximize global impact, motivated by the idea that our products will change the lives of millions along with the people you love.
The FPGA is at the heart of our revolutionary Butterfly iQ ultrasound device. As a designer of this part, you will work closely with our ASIC, EE, Imaging, and Firmware teams.
As part of our team, your core responsibilities will be:
- Convert complex beamforming algorithms (how the sound waves are converted into images) into Verilog, to accelerate these algorithms into working prototypes, and to verify the designs for customer shipments.
- Responsible for the selection of next generation FPGA devices, and working with your ASIC and EE colleagues, will develop the high-speed interfaces to pipeline the ultrasound data.
- Working with your embedded colleagues, you will select and implement an embedded microprocessors.
- BS or MS in Electrical Engineering, Computer Engineering, or Computer Science.
- 4+ years of FPGA (preferred) or ASIC design, verification, and implementation.
- Verilog expert
- Experience with system-on-a-chip design, including embedded microprocessors (e.g., ARM, Tensilica, Nios, MIPS), on-chip memories, and bus architectures.
- Comfortable working in a Linux environment and using version control (e.g., SVN, Git, or Mercurial).
- Familiar with Python, TCL, make, or other common scripting languages.
- Experience with DSP (digital signal processing)
- Must be organized and self-motivated, able to turn abstract ideas into concrete designs.
- Must be a team player who enjoys working in a highly collaborative environment.
Ideally, you also have these skills/experiences/attributes (but it’s ok if you don’t!):
- Numerous Verilog Designs shipping to customers
- Competent with the Altera, Xilinx, and Micro-Semi development environments
- Some ASIC design experience
- Selecting and integrating complex 3rd party IP cores, such as PCI Express, USB, DDR-SDRAM, or 10G Ethernet.
- Ability to proactively optimize for cost, power, and computation, as aligned w/ organizational and project priorities
- Implementation of digital signal processing algorithms and good knowledge of DSP theory
- Numeric programming with NumPy or Matlab.
- C/C++ on embedded processors running bare-metal, an RTOS, or Linux
- Experience shipping Medical devices and the use of Design Controls
We offer great perks:
- Fully covered medical insurance plan, and dental & vision coverage - as a health-tech company, we place great worth on our teams’ well-being
- Competitive salaried compensation - we value our employees and show it
- Equity - we want every employee to be a stakeholder
- Pre-tax commuter benefits - we make your commute more reasonable
- Free onsite meals + kitchen stocked with snacks.
- 401k plan - we facilitate your retirement goals
- Beautiful office near the ocean-front in historic Guilford, Connecticut
- The opportunity to build a revolutionary healthcare product and save millions of lives!
For this role, we provide visa assistance for qualified candidates.
Butterfly network does not accept agency resumes.
Butterfly Network Inc. is an E-Verify Company and is an equal opportunity employer regardless of race, color, ancestry, religion, gender, national origin, sexual orientation, age, citizenship, marital status, disability or Veteran status. All your information will be kept confidential according to EEO guidelines.